Computer architecture : a quantitative approach / John L. Hennessy [and] David A. Patterson

By:

Hennessy, John L [author]

Contributor(s):

David, Patterson A [co-author]

Material type: Text

TextPublication details: Cambridge, MA : Morgan Kaufman, c2019Edition: Sixth EditionDescription: xxix, [936 pages] illustrations ; 24 cmISBN:

9780128119051

Subject(s):

LOC classification:

QA 76.9 .H46 2019

Contents:

Foreword -- Preface -- Acknowledgments -- 1. Fundamentals of Quantitative Design and Analysis -- 2. Memory Hierarchy Design -- 3. Instruction-Level Parallelism and Its Exploitation -- 4. Data-Level Parallelism in Vector, SIMD, and GPU Architectures -- 5. Thread-Level Parallelism -- 6. Warehouse-Scale Computer -- 7. Domain Specific Architectures -- Appendices -- References -- Index

Summary: "Computer Architecture: A Quantitative Approach, Sixth Edition has been considered essential reading by instructors, students and practitioners of computer design for over 20 years. The sixth edition of this classic textbook from Hennessy and Patterson, winners of the 2017 ACM A.M. Turing Award recognizing contributions of lasting and major technical importance to the computing field, is fully revised with the latest developments in processor and system architecture. The text now features examples from the RISC-V (RISC Five) instruction set architecture, a modern RISC instruction set developed and designed to be a free and openly adoptable standard. It also includes a new chapter on domain-specific architectures and an updated chapter on warehouse-scale computing that features the first public information on Google's newest WSC." -- Provided by the publisher

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Holdings
Item type	Current library	Collection	Call number	Materials specified	Status	Date due	Barcode
Books	NU Clark Circulation	Non-fiction	GC QA 76.9 .H46 2019 (Browse shelf(Opens below))		Available		NUCLA000005531

Includes bibliographical references and index.

"Computer Architecture: A Quantitative Approach, Sixth Edition has been considered essential reading by instructors, students and practitioners of computer design for over 20 years. The sixth edition of this classic textbook from Hennessy and Patterson, winners of the 2017 ACM A.M. Turing Award recognizing contributions of lasting and major technical importance to the computing field, is fully revised with the latest developments in processor and system architecture. The text now features examples from the RISC-V (RISC Five) instruction set architecture, a modern RISC instruction set developed and designed to be a free and openly adoptable standard. It also includes a new chapter on domain-specific architectures and an updated chapter on warehouse-scale computing that features the first public information on Google's newest WSC." -- Provided by the publisher

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